1. Field of the Invention
This invention relates to a semiconductor integrated circuit device in which elements having different switching speeds are integrated on a single chip.
2. Description of the Related Art
A discrete semiconductor device for high power, such as a power MOS transistor or an IGBT, employs a technique for controlling the life time of carriers so as to increase the switching speed. This technique is generally called "life time control". Specifically, the life time control is to form a multiplicity of recombination centers of carriers in a substrate by diffusing heavy metal into the substrate, thereby increasing the rate of extinction of excessive minority carriers and hence the switching speed of the device. A technique for controlling the life time of carriers are described, for example, in B. J. Baliga et al. IEEE Trans. Electron Devices, vol. ED-24, No. 6 pp. 685 (1977). Since this technique enables the recombination centers of carriers to be formed substantially uniform in the substrate, all elements can have short carrier life time.
Although the life time control technique can increase the switching speed, it inevitably reduces the current capacity. This is because the rate of extinction of majority carriers is increased as a result of the forming of the recombination centers of carriers in the substrate. Further, damage (crystal defect) due to life time control reduces the current amplification factor of the device, or changes the threshold voltage of the device.
Since, as described above, there is a trade-off relationship between the increase of switching speed and the security of current capacity, it is difficult for the conventional life time control technique to reconcile them.
In the field of semiconductor integrated circuit devices, there is a tendency to try to integrate, in a single chip, an element for high power and an element constituting a circuit for driving or controlling the element for high power. Such an integrated circuit device is called an "IPD (Intelligent Power Device)", which is described, for example, in R. S. Wrathall et al. IEEE Power Electronics Specialists Conference, pp. 229-233 (1985) and Y. Ohata et al. IEEE Custom Integrated Circuit Conference, pp. 443-446 (1987).
In the semiconductor integrated circuit device of this type, each chip has both an element for increasing the switching speed, i.e., a power-related element (or power system element), and an element from which the influence of the life time control should be prevented (i.e., an element whose current amplification factor and threshold voltage should be accurately adjusted), i.e., a logic-related element (or logic system element).
Actually, however, no technique for simultaneously satisfying a demand for an increase in the switching speed of the power-related element and a demand for reducing the influence of the life time control on the logic-related element has not yet been found.